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[Other] mif

Description: 使用metlab生产正弦波和三角波的采样值，供vhdl等语言调用来产生波形-use metlab production sine wave and triangular wave of sampling, for languages such as call vhdl to generate waveforms
Platform: | Size: 1005 | Author: feng | Hits:

[Embeded-SCM Develop] Guagle_wave

Description: VHDL mif file generator, which can generate several waves
Platform: | Size: 216834 | Author: 陈翔宇 | Hits:

[Other] mif

Description: 使用metlab生产正弦波和三角波的采样值，供vhdl等语言调用来产生波形-use metlab production sine wave and triangular wave of sampling, for languages such as call vhdl to generate waveforms
Platform: | Size: 1024 | Author: feng | Hits:

[Embeded-SCM Develop] quartusGuide

Description: 设计输入 ! 多种设计输入方法 – Quartus II • 原理图式图形设计输入 • 文本编辑 – AHDL, VHDL, Verilog • 内存编辑 – Hex, Mif – 第三方工具 • EDIF • HDL • VQM – 或采用一些别的方法去优化和提高输入的灵活性: • 混合设计格式 • 利用LPM和宏功能模块来加速设计输入-design input! Design a variety of input methods-Quartus
Platform: | Size: 844800 | Author: fgghh | Hits:

[Embeded-SCM Develop] Guagle_wave

Description: VHDL mif file generator, which can generate several waves -VHDL mif file generator, which can generate several waves
Platform: | Size: 216064 | Author: 陈翔宇 | Hits:

[VHDL-FPGA-Verilog] controlunit

Description: CPU设计中的controlunit源码，其中附带了时序仿真。通过Sequencing Logic 产生 control_signals,具体的信号可在controlsignal.mif文件中直接修改。 -CPU design controlunit source, which comes with timing simulation. Sequencing Logic generated through control_signals, specific signals can directly modify the controlsignal.mif document.
Platform: | Size: 328704 | Author: ck | Hits:

[VHDL-FPGA-Verilog] mif

Description: 编制FPGA中RAM所需要的MIF文件 编制FPGA中RAM所需要的MIF文件-FPGA in the preparation of RAM required for the preparation of MIF files in the RAM of the FPGA needs MIF file
Platform: | Size: 1936384 | Author: 史东升 | Hits:

[VHDL-FPGA-Verilog] sine

Description: chdl 64位计数器，利用mif格式文件产生正弦波。可以在fpga模拟正弦波-chdl 64 bit counter, using sine wave generated mif format. Sine wave can be simulated in FPGA
Platform: | Size: 268288 | Author: yyqdian | Hits:

[VHDL-FPGA-Verilog] ug_lpm_rom

Description: quartus rom的生成 运用matlab生成.mif或.hex文件 载入rom表-quartus rom the use of matlab generated generation. mif or. hex file loading rom Table
Platform: | Size: 824320 | Author: 王欣欣 | Hits:

[VHDL-FPGA-Verilog] vga_hex_disp

Description: 该项目可在VGA显示器上显示ＲＡＭ或ＲＯＭ中的十六进制数据，使用ＶｅｒｉｌｏｇＨＤＬ语言编写，在ＱｕａｒｔｕｓＩＩ开发环境下验证。-The Project displays the content of memory cells in the form of hexadecimal numbers. It uses RAM and ROM memory modules available through special functions. This is why before compiling the whole code the user should open mem.v file and change lpm_ram declarations in RAM module and lpm_rom declarations in ROM module into such that are suitable for a particular producer and scheme. There also may appear the necessity of converting .mif files used to memory initialization. The Memory Initialization File is serviced by the Quartus II environment developed by Altera.
Platform: | Size: 18432 | Author: submars | Hits:

[Other] rom

Description: Turbo码编码器的Rom宏模块，此模块中包含Rom.v文件和存储交织地址的.mif文件-Turbo code encoder Rom macro module, this module contains intertwined Rom.v documents and store addresses. Mif file
Platform: | Size: 9216 | Author: sunhao | Hits:

[VHDL-FPGA-Verilog] vgaclock

Description: vga显示的数字时钟,用mif文件实现，用以大家学习交流-vga display digital clock, with the realization of mif file for them to learn from the exchange of
Platform: | Size: 51200 | Author: jichun | Hits:

[VHDL-FPGA-Verilog] FPGArealiztionofdigitalsignalprocessing

Description: 数字信号处理FPGA实现 实用程序和文件,有sine.exe ---输入宽度。输出对应的正弦波表 mif文件 csd.exe --- 寻找整数和分数的标准有符号数字量（canonical signed digit ，CSD）表达式程序 fpinv.exe --- 倒数计算浮点数表的程序 dagen.exe ---分布式算法文件生成HDL" onclick="tagshow(event)" class="t_tag">VHDL代码的程序 cic.exe ---CIC滤波器计算参数的程序 -Digital Signal Processing FPGA realization of practical procedures and documents, there are sine.exe--- input width. Sine wave output of the corresponding csd.exe--- Table mif file to find the integer and fractional number of the volume of standard symbols (canonical signed digit, CSD) Expression Programming fpinv.exe--- countdown procedures for calculation of floating-point form dagen.exe--- documents distributed algorithm to generate HDL " onclick =" tagshow (event) " class =" t_tag " > VHDL program code cic.exe--- CIC filter process parameters
Platform: | Size: 260096 | Author: kevin | Hits:

[VHDL-FPGA-Verilog] 1024

Description: 用C写的mif文件正弦波数据文件，很好用的数据哦-Written by C sine wave data file mif file
Platform: | Size: 4096 | Author: liang | Hits:

[Other] mif

Description:
Platform: | Size: 4096 | Author: hanbin | Hits:

[SCM] 1

Description: VGA01目录下有TTOP.BIN，下载后有如下效果： 插上显示屏： 屏幕显示两层图片，下层是静态的两个字，我的名字。 上层是一个128X64的256色图片， 插上键盘： 按键盘大键盘区的1－9,板子上的7段会有显示数字，按<-删除键删除一个数字。 visualC目录下是一个小程序，将BMP转换成rom.mif ROM存储器初始化文件。-VGA01 directory under TTOP.BIN, download the following effect: plug in the display: two-tier display picture, the lower is the word static, my name. 128X64 upper is a 256 color photos, plug in the keyboard: the keyboard great keyboard by the 1-9 zone, the board will show the number of paragraph 7, according to <- Delete key to delete a number. visualC directory is a small program to convert BMP memory initialization file rom.mif ROM.
Platform: | Size: 1695744 | Author: jinbang | Hits:

[Other] RS(204.188)design

Description: RS(204,188)译码器说明 原文件： rs_decoder.v（顶层文件）, SyndromeCalc.v（计算伴随式）, BM_KES.v（BM求解关键方程）, Forney.v（Forney算法求误差样值）, CheinSearch.v（搜索错误位置）,ff_mul.v（有限域乘法）。 ROM及初始化文件： rom_inv.v（求逆运算）, rom_power.v（求幂运算）； rom_inv.mif（ROM初始化文件）, rom_power.mif（ROM初始化文件）。 仿真波形： rs_decoder.vwf。-RS (204,188) decoder that the original document: rs_decoder.v (top-level document), SyndromeCalc.v (calculated Syndrome), BM_KES.v (BM key equation solving), Forney.v (Forney algorithm for error-like value), CheinSearch.v (search the wrong location), ff_mul.v (finite field multiplication). ROM and the initialization file: rom_inv.v (inverse operation), rom_power.v (for power calculations) rom_inv.mif (ROM initialization file), rom_power.mif (ROM initialization files). Simulation waveforms: rs_decoder.vwf.
Platform: | Size: 14336 | Author: 川天古木 | Hits:

[Embeded-SCM Develop] Micro-program

Description: 微程序控制电路是CPU 控制器的核心电路，控制产生指令执行时各部件协调工作所需的所有控制信号，以及下一条指令的地址。微程序控制器的组成如图6-12 所示，主要由三个部分组成，分别是微指令控制电路、微地址寄存器和微指令存储器lpm_rom 其中微指令控制电路用组合电路对指令中的1[7..2] 、操作台控制信号SWA 和SWB 的状态、状态寄存器的输出状态FC 、FZ ，产生微地址变化的控制信号，实现对微地址控制:微地址寄存器控制电路的基本输入信号是微指令存储器的下地址字段M[6..1] ，同时还受微指令控制电路的输出信号SE[6..1]和复位信号RST 的控制，输出下一个微指令的地址:控制存储器由FPGA 中的LPM ROM 构成，输出24 位控制信号。在24 位控制信号中，微命令信号为18 位，微地址信号豆位。在口时刻将打入微地址寄存器UA 的内容，即为下一条微指令地址.当T4时刻进行测试判别时，转移逻辑满足条件后输出的负脉冲，通过强制端将某一触发器置为"1"状态，完成地址修改。微程序控制器中的微控制代码可以通过对FPGA 中LPMß OM 的配置进行输入，通过编辑LPM ROM.mif 文件来修改微控制代码。详细情况可参考LPIÞ CROM的配置方法。微指令控制电路内部结构如图6-2 ， 6-3. 6-13 所示-Micro-program control circuit is the core CPU controller circuit, the control instruction execution produces the coordination of all parts of all the necessary control signals, and the next instruction address. The composition of micro-program controller shown in Figure 6-12, the main three components, namely, microinstruction control circuit, micro-address register and the microcode memory lpm_rom microcode control circuit which combination circuit with instruction in the 1 [ 7 .. 2], SWA and SWB console control signal state, the state register output state FC, FZ, produce changes in micro-address control signals, to realize the micro-address control: micro-address register control circuit input signal is the basic micro- The next address field instruction memory M [6 .. 1], but also by the microcode control circuit output signal SE [6 .. 1] and reset control signal RST, the output of the next microinstruction address: control memory by the FPGA in the LPM ROM form, the output 24-bit
Platform: | Size: 2584576 | Author: 623902748 | Hits:

[VHDL-FPGA-Verilog] sinbo

Description: 基于quartus II的正弦波发生器，可调频率相位，用其时序仿真即可显示，分模块设计的。有sin。mif文件.-Based quartus II of the sine wave generator, adjustable frequency and phase, with the timing simulation can show that sub-module design. A sin. mif file.
Platform: | Size: 995328 | Author: liyu | Hits:

[Special Effects] MakeImageData

Description: 用Delphi来发生彩色LED显示屏的资料。在VHDL固件里，保存这个资料作为mif样式到ROM架构。终于FPGA芯片显示静止图像在LED屏幕。(We developed Delphi application. This application generate initial data of VHDL firmware. This data has a <*.mif> style. FPGA chip using this initial data displays still image on color LED display.)
Platform: | Size: 387072 | Author: cnd4791 | Hits:
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